How many devices can be connected to the I2C bus? In theory: 7-bit address: 2 to the power of 7, can connect 128 devices. 10-bit address: 2 to the power of 10, can connect 1024 devices. Of course, the reserved device addresses must be removed. The 7-bit protocol specifies 8 reserved addresses that cannot be used by ordinary manufacturers. The reserved addresses are as follows: However, the I2C protocol stipulates that the capacitance on the bus cannot exceed 400pF. The pins all have input capacitance, and there is also parasitic capacitance on the PCB, so there is a limit. In actual design, the empirical value is probably no more than 8 devices. The reason why the bus specifies the capacitance size is that the GPIO used by I2C is an open-drain structure, which cannot output a high level and requires an external pull-up resistor to pull it up. The resistor and bus capacitance produce an RC delay effect. The larger the capacitance, the slower the edge of the signal, which may bring signal quality risks. The faster the transmission speed, the smaller the signal window is, and the rising and falling edge times are required to be shorter and steeper, so the RC product must be smaller. I2C ArchitectureWe know that I2C has different speed modes, standard (100KHz), fast (400KHz), fast plus (1MHz), high speed (3.4MHz). Vdd can be 5V, 3.3V, 1.8V, etc. The pull-up resistor value will be different depending on the power supply voltage. Generally, on the bus, a voltage below 0.3Vdd is considered a low level, and a voltage above 0.7Vdd is considered a high level. Pull-up resistor calculation1. The pull-up resistance is too small, the current on the bus increases, and the port outputs a low level. 2. If the pull-up resistor is too large, the rising edge time will increase and the square wave may become a triangle wave. Therefore, it is very important to calculate an accurate pull-up resistor value. There is a clear formula for calculating the resistance of the pull-up resistor: The maximum resistance is related to the rise time tr, bus capacitance Cb, and standard rise time 0.8473. The minimum resistance is related to the power supply Vdd voltage, the GPIO port's own maximum output voltage Vol, and the GPIO port's own maximum current Vol. Check "I2C-bus specification and user manual.pdf" section 7.1: Check Table 10 of "I2C-bus specification and user manual.pdf": From the above table, we can see that: 1. Standard mode: 0~100KHz, rising edge time tr = 1us 2. Fast mode: 100~400KHz, rising edge time tr = 0.3us 3. High-speed mode: up to 3.4MHz, rising edge time tr = 0.12us From this formula, assuming that Vdd is powered by 1.8V, the Cb bus capacitance is 200pF (although the protocol stipulates that the maximum load capacitance is 400pF, in fact, the waveform will be very bad if it exceeds 200pF, so we use 200pF for calculation) Standard Mode: Fast Mode: High-speed mode: Minimum resistance (the larger the Vdd, the larger the pull-up resistance): Note: In high-speed mode, the power supply voltage is generally 1.8 V, not 3.3 V, because if you use 3.3 V to calculate, you will find that the minimum resistance is larger than the maximum resistance. The resistors used at different rates are generally the following: 1.5K, 2.2K, and 4.7K. Generally, we use I2C in standard mode, which is 100KHz. The recommended pull-up resistor is 4.7K. Of course, we can use an oscilloscope to view the transmission waveform and make appropriate adjustments. Conclusion: The resistance value of the I2C pull-up resistor is related to the power supply voltage, transmission speed, and bus capacitance (load factor). You can calculate it according to your own board and select the optimal resistance value to obtain the optimal transmission waveform. Relationship diagram between maximum resistance Rp and bus capacitance Cb: Note: It is recommended that the bus capacitance be kept below 100pF. |
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